RN-HDL FPGA / CPLD Training System


  • XC3S50 (Xilinx-Spartan3 FPGA) + XCF02S (FLASH) header board
  • XC95144 (Xilinx CPLD) header board
  • 24 x LED, HEX display, dot-matrix and 4-digit multiplex 7-segment display
  • 16×2 character LCD + 128×64 graphical LCD
  • Stepper motor and DC motor with shafted encoder sensor
  • Equipped by temperature, opto, humidity and natural gas sensors
  • IrDA receiver and transmitter
  • HM-T & HM-R receiver and transmitter
  • 8-bit analog to digital converter
  • 8-bit digital to analog converter
  • 8 x push-button switch, 8 x data latch switch, 4×4 keypad and MC14490 debounce circuit
  • RS-232, RS-485 and USB interface
  • AVR microcontroller unit
  • MT8870 tone decoder
  • 555 timer, 5v buzzer and speaker
  • Reading and writing into the EEPROM with SPI and I2C protocols
  • 7414 low frequency square wave oscillator

Power supply and bread board

  • Implementation the basic logical gates with 2 and 3 inputs
  • Implementation the comparative and arithmetic operators
  • Implementation the half adder and full adder
  • Implementation the decoder and encoder
  • Implementation the multiplexer and demultiplexer
  • Implementation the bit parity generator
  • Implementation the basic flip-flops with preset and clear inputs
  • Implementation the up, down, ring and Johnson counter
  • Implementation the different shift registers
  • Setting up the 7-segment and HEX display
  • Setting up the dot-matrix display
  • Setting up the 4×4 keypad
  • Remove the bounces of push button switches using MC14490
  • Setting up the stepper motor
  • Setting up the DC motor
  • Setting up the ADC circuit based on ADC0809
  • Setting up the DAC circuit based on DAC0800
  • Interface to computer using RS-232 converter and serial port
  • Wireless transmission of coded data using HM-T and HM-R transmitter/receiver
  • Wireless transmission of coded data using infrared transmitter and receiver

Decode the tone signals using MT8870

نقد و بررسی‌ها

هنوز بررسی‌ای ثبت نشده است.

اولین کسی باشید که دیدگاهی می نویسد “RN-HDL FPGA / CPLD Training System”

نشانی ایمیل شما منتشر نخواهد شد. بخش‌های موردنیاز علامت‌گذاری شده‌اند *